1. Field of the Invention
This invention relates to vertical cavity surface emitting laser arrays and to detector arrays. More specifically, it relates to submounts for vertical cavity surface emitting laser arrays and for detector arrays.
2. Discussion of the Related Art
Vertical cavity surface emitting lasers (VCSELs) represent a relatively new class of semiconductor lasers. While there are many variations of VCSELs, one common characteristic is that they emit light perpendicular to a wafer's surface. VCSELs can be formed from a wide range of material systems to produce specific characteristics. VCSELs are relatively complex devices having active regions, distributed Bragg reflector (DBR) mirrors, current confinement structures, substrates, and contacts.
FIG. 1 illustrates a typical VCSEL 10. As shown, an n-doped gallium arsenide (GaAS) substrate 12 has an n-type electrical contact 14. An n-doped lower mirror stack 16 (a DBR) is on the GaAS substrate 12, and an n-type graded-index lower spacer 18 is disposed over the lower mirror stack 16. An active region 20 having a plurality of quantum wells is formed over the lower spacer 18. A p-type graded-index top spacer 22 is disposed over the active region 20, and a p-type top mirror stack 24 (another DBR) is disposed over the top spacer 22. Over the top mirror stack 24 is a p-conduction layer 9, a p-type GaAs cap layer 8, and a p-type electrical contact 26.
Still referring to FIG. 1, the lower spacer 18 and the top spacer 22 separate the lower mirror stack 16 from the top mirror stack 24 such that an optical cavity is formed. Because an optical cavity is resonant at specific wavelengths, the mirror separation is controlled to resonate at a predetermined wavelength (or at a, multiple thereof). At least part of the top mirror stack 24 includes an insulating region 40 that is usually formed either by implanting protons into the top mirror stack 24 or by forming an oxide layer. The insulating region 40 surrounds a conductive annular central opening 42. Thus, the central opening 42 forms an electrically conductive path though the insulating region 40.
In operation, an external bias causes an electrical current 21 to flow from the p-type electrical contact 26 toward the n-type electrical contact 14. The insulating region 40 and the conductive central opening 42 confine the current 21 flow through the active region 20 where some of the electrons are converted into photons. Those photons bounce back and forth (resonate) between the lower mirror stack 16 and the top mirror stack 24. While the lower mirror stack 16 and the top mirror stack 24 are very good reflectors, some of the photons leak out as light 23 that travels along an optical path. Still referring to FIG. 1, the light 23 passes through the p-type conduction layer 9, through the p-type GaAs cap layer 8, through an aperture 30 in the p-type electrical contact 26, and out of the surface of the vertical cavity surface emitting laser 10.
It should be understood that FIG. 1 illustrates a typical VCSEL, and that numerous variations are possible. For example, the dopings can be changed (say, by providing a p-type substrate 12 and reversing current flow), different material systems can be used, operational details can be varied, and additional structures, such as tunnel junctions, can be added. Furthermore, while individual VCSELs are of interest, many applications use an array of VCSEL elements. For example, FIG. 2 illustrates a VCSEL array 60 comprised of four individual VCSELs 68. For example, the VCSEL array 60 could be comprised of 4 VCSELs 68 that are each in accord with the VCSEL 10 shown in FIG. 1, with the light emitting regions of the individual VCSELs being separated by 250 microns. Additionally, many applications require a detector array that mates with the VCSEL array 60. Turning now to FIG. 3, such a detector array 66 can be comprised of individual photodetectors 65 that are spaced apart the same distance as the individual VCSELs 68 in the VCSEL array 60. While FIGS. 2 and 3 show arrays comprised of 4 elements, other arrays will have different numbers of elements (with 4 and 12 element arrays being fairly common).
While generally successful, VCSEL arrays and matching detector arrays have problems. For example, many VCSEL arrays and/or detector arrays are mounted by direct attachment of the VCSEL/detector array substrate to another structure, such as a printed circuit board or a chip carrier. To assist attachment, VCSEL/detector array substrates are usually relatively large, which adds significantly to their cost. Furthermore, in many applications the electrical connections to and from a VCSEL/detector array substrate are made using tab bonding. Such bonding is problematic with frequently used GaAs substrates. Additionally, in some applications VCSEL/detector array substrates have been difficult to use because physical alignment mechanisms are needed, and incorporating such alignment mechanisms on a substrate was difficult.
Therefore, a new technique of mounting VCSEL and detector arrays would be beneficial. Even more beneficial would be a new technique of mounting VCSEL and detector arrays on a submount that enables a reduction in the size of the semiconductor array. Even more beneficial would be an electrically connected structure that facilitates handling and testing prior to incorporation of that structure into a higher level assembly. Still more beneficial would be a new technique of mounting VCSEL and detector arrays on a submount that assists tab bonding of electrical connections, and that includes alignment structures for both optical and mechanical assembly.